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The agreement allows Imagination customers to incorporate UltraSoC’s real-time trace and control capabilities into their SoC products, providing intimate visibility of the internal operation of the device with very little silicon overhead.
It also enables Imagination to significantly enhance its development flow, offering its customers faster development times, improved quality of results, more optimized designs and substantially lower risk overall.
The agreement with Imagination follows UltraSoC’s announcement earlier this year of support for Imagination’s MIPS CPU architecture.
UltraSoC complements the infrastructure of standard tools, software and services available to designers using MIPS, which is one of the most widely supported and deployed processor architectures.
Support from UltraSoC encompasses not only MIPS processors via an interface to Imagination’s Codescape Debugger, but also CPUs and IP from other vendors, as well as custom logic, memory and bus structures.
UltraSoC CEO Rupert Baines (pictured) commented: “We’re very proud to have been selected by Imagination, and we’re looking forward to a fruitful on-going relationship. UltraSoC offers a holistic view of a chip’s operation that helps SoC designers to manage complexity and focus on the key task of producing high-quality, innovative products, and getting them to market quickly. Imagination has an outstanding reputation for assisting customers with just these kinds of requirements, and we’re delighted to be working together.”
Imagination provides its customers with design services and software integration – offering a low-risk path to production.
UltraSoC provides a toolbox of silicon IP, with supporting software, that system architects and development teams can use to monitor and analyze the internal behavior of a chip – in real-time and under real operating conditions.
As well as assisting developers with classic processor debug and trace capabilities, these capabilities can also be employed when the chip is deployed in an end product, spotting unexpected behavior and providing hardware-based protection against malicious attacks and malfunctions.
